A test bench to generate a high dV/dt voltage signal to simulate signal coupling on the power line so that the engineers can predict the performance of the chip under high electromagnetic interference. This project is aiming to design and test the test bench. Based on this design requirements, the research is based on the research question “What design of a dV/dt test bench can generate a signal with a voltage range from 0-60V, a 10V/µs slew rate and at least 1A driving current that can be controlled by software on a computer?”
The research method in this project is V-model. By using V-model, the system is decomposed into three subsystems: signal generation system, circuit control system and PC GUI system, so that the system can be partially designed and tested.
The report will mainly focus on the following issue:
Signal Generation Hardware design: This part is the most important part of this design. The signal generation part uses a high-power Op Amp to generate a voltage signal up to 65V and deliver 1A current.
Signal Generation Control Hardware design: The circuit control system is focused on controlling the real-time process of voltage signal generation. This system will make sure the signal is continuously sent to Signal Generation System and not interrupted by operation system on PC. This system is based on Altera FPGA to ensure the strict timing requirements of this project.
Signal Generation Control Software design: In this section, the software on PC to control the signal generation process is designed. The software can display the signal to be generated.
Test Results and Analysis: Based on the former three parts of the design, the test was carried out to verify whether the software and hardware can work as excepted. By measuring the output voltage and output current, the results show the design can fulfill the requirements. In conclusion, a dV/dt test bench is made with control software and signal generation hardware. The hardware is controlled by FPGA which ensures the signal generation system is working under real time. The test bench can generate 0-65V and deliver at least 1A current.